Catapult C Synthesis is a high-level synthesis tool for ASIC and FPGA hardware designers who need to deliver optimal implementations with aggressive time-to-market requirements. Catapult supports both pure untimed ANSI C and SystemC, the two major standard languages for high-level design and synthesis, and produces optimal RTL for complex hierarchical systems comprised of control-logic and algorithmic units. Designers precisely control the synthesized hardware implementation by applying high-level constraints managing design aspects such as interface protocols, memory architecture, throughput, latency and low-power transformations.Technology-aware synthesis leverages physical information to precisely schedule hardware resources and structure control logic to produce superior designs and predictable timing closure. Using the comprehensive set of built-in analysis tools, designers interactively analyze, optimize, and rapidly converge on the optimal solution in terms of power, performance, and area.
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